DocumentCode
2481017
Title
Synthesis of Quasi Delay Insensitive monitors
Author
Porcher, Alexandre ; Morin-Allory, Katell ; Fesquet, Laurent
Author_Institution
TIMA Lab., INPG/UJF/CNRS, Grenoble, France
fYear
2011
fDate
3-7 July 2011
Firstpage
225
Lastpage
228
Abstract
This paper presents a method to synthesize hardware functional asynchronous monitors from a formal representation. It is essential to get correct information and avoid erroneous messages from these monitors that check properties on synchronous designs. Asynchronous Quasi-Delay Insensitive (QDI) designs are very robust to the environment variations; they remain functional in a wide range of power supplies or temperatures. Uniqueness of the claimed approach lies on the use of QDI technology to construct the monitors leading them to be more robust than synchronous monitors in safety critical environment.
Keywords
asynchronous circuits; asynchronous quasidelay insensitive designs; formal representation; safety critical environment; synchronous designs; synchronous monitors; Libraries; Logic gates; Monitoring; Rails; Synchronization; Temperature measurement; Temperature sensors;
fLanguage
English
Publisher
ieee
Conference_Titel
Ph.D. Research in Microelectronics and Electronics (PRIME), 2011 7th Conference on
Conference_Location
Trento
Print_ISBN
978-1-4244-9138-4
Electronic_ISBN
978-1-4244-9136-0
Type
conf
DOI
10.1109/PRIME.2011.5966274
Filename
5966274
Link To Document