• DocumentCode
    2481141
  • Title

    Aurora: A thermally resilient photonic network-on-chip architecture

  • Author

    Qouneh, Amer ; Li, Zhongqi ; Joshi, Madhura ; Zhang, Wangyuan ; Fu, Xin ; Li, Tao

  • Author_Institution
    Univ. of Florida, Gainesville, FL, USA
  • fYear
    2012
  • fDate
    Sept. 30 2012-Oct. 3 2012
  • Firstpage
    379
  • Lastpage
    386
  • Abstract
    With silicon optical technology moving towards maturity, the use of photonic network-on-chip (NoCs) for global chip communication is emerging as a promising solution to communication requirements of future many core processors. It is expected that photonic NoCs will play an important role in alleviating current power, latency, and bandwidth constraints. However, photonic NoCs are sensitive to ambient temperature variations because their basic constituents, ring resonators, are themselves sensitive to those variations. Since ring resonators are basic building blocks for photonic modulators, switches, multiplexers, and demultiplexers, variations of on-chip temperature pose serious challenges to the proper operation of photonic NoCs. Proposed methods that mitigate the effects of temperature at device level are either difficult to use in CMOS processes or not suitable for large scale implementation. In this paper, we propose Aurora, a thermally resilient photonic NoC architecture design that supports reliable and low bit error rate (BER) on-chip communications in the presence of large temperature variations. Our proposed architecture leverages solutions at both device and architecture layers that synergistically provide significant improvements. To compensate for small temperature variations, our design varies the bias current through ring resonators. For larger temperature variations, we propose architecture-level techniques to re-route messages away from hot regions, and through cooler regions, to their destinations, thereby lowering BER. Our simulation results show that Aurora provides a robust architectural solution to handle temperature variation effects on future photonic NoCs. For instance, average BER and message error rate (MER) are reduced by 78% and 30% respectively when the combined device and architectural technique (SPF) is applied. From the perspective of power efficiency, Aurora is also superior to conventional photonic NoC architectures by as much as 3- %.
  • Keywords
    CMOS integrated circuits; error statistics; microprocessor chips; network-on-chip; Aurora; BER on-chip communication; CMOS processes; MER; SPF; architectural technique; bandwidth constraints; bit error rate on-chip communication; core processors; current power; demultiplexers; large scale implementation; message error rate; multiplexers; on-chip temperature; photonic NoC; photonic modulators; ring resonators; switches; thermally resilient photonic network-on-chip architecture; Bit error rate; Modulation; Optical ring resonators; Optical waveguides; Photonics; Refractive index;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design (ICCD), 2012 IEEE 30th International Conference on
  • Conference_Location
    Montreal, QC
  • ISSN
    1063-6404
  • Print_ISBN
    978-1-4673-3051-0
  • Type

    conf

  • DOI
    10.1109/ICCD.2012.6378667
  • Filename
    6378667