4.55GHz phase and quadrature pulsed bias VCO in 40nm CMOS technology

Pulsed bias is an innovative technique introduced to improve the performance of oscillators in integrated circuits and is based on recent development of Floquet eigenvectors theory. Given the relatively low value of resonator quality factor achievable on-chip, for a specified bias voltage level, pulsed bias may result in a lower power consumption and in an improvement of the spectral purity of the oscillation. The main drawback of this approach is the need to introduce a certain time delay in order to properly position pulses with respect to oscillation waveform. Delay accumulation requires further energy dissipation and introduces additional jitter. In this paper we present a new architecture capable to avoid unnecessary delay, based on the idea to apply the pulsed bias approach to a quadrature oscillator.