• DocumentCode
    2481192
  • Title

    Improving inclusive cache performance with two-level eviction priority

  • Author

    Li, Lingda ; Tong, Dong ; Xie, Zichao ; Lu, Junlin ; Cheng, Xu

  • Author_Institution
    Microprocessor R&D Center, Peking Univ., Beijing, China
  • fYear
    2012
  • fDate
    Sept. 30 2012-Oct. 3 2012
  • Firstpage
    387
  • Lastpage
    392
  • Abstract
    Inclusive cache hierarchies are widely adopted in modern processors, since they can simplify the implementation of cache coherence. However, it sacrifices some performance to guarantee inclusion. Many recent intelligent management policies are proposed to improve the last-level cache (LLC) performance by evicting blocks with poor locality earlier. Unfortunately, they are inapplicable in inclusive LLCs. In this paper, we propose Two-level Eviction Priority (TEP) policy. Besides the eviction priority provided by the baseline replacement policy, TEP appends an additional high level of eviction priority to LLC blocks, which is decided at the insertion time and cannot be changed during their lifetime in the LLC. When blocks with high eviction priority are not in inner caches anymore, they get evicted from the LLC preferentially. Thus, the LLC can retain more useful blocks to improve performance. TEP can cooperate well with various baseline replacement policies. Our evaluation shows that TEP with NRU can improve the performance of inclusive LLCs significantly while requiring negligible extra storage. It also outperforms other recent proposals including QBS, DIP, and DRRIP.
  • Keywords
    cache storage; LLC blocks; NRU; TEP policy; baseline replacement policy; cache coherence; inclusive cache hierarchies; inclusive cache performance; intelligent management policies; last-level cache performance improvement; two-level eviction priority policy; Benchmark testing; Coherence; Electronics packaging; Program processors; Proposals; Radiation detectors; Sensitivity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design (ICCD), 2012 IEEE 30th International Conference on
  • Conference_Location
    Montreal, QC
  • ISSN
    1063-6404
  • Print_ISBN
    978-1-4673-3051-0
  • Type

    conf

  • DOI
    10.1109/ICCD.2012.6378668
  • Filename
    6378668