Title :
Adaptive memory architecture for real-time image warping
Author :
Motten, Andy ; Claesen, Luc ; Pan, Yun
Author_Institution :
Expertise Centre for Digital Media, Hasselt Univ. - tUL - IBBT, Diepenbeek, Belgium
fDate :
Sept. 30 2012-Oct. 3 2012
Abstract :
This paper presents a real time image warping module implemented in hardware. A look-up table (LUT) based reverse mapping is used to relate the source image to the warped image. Frame buffers or line buffers are often used to temporally store the source image. However these methods do not take the underlying pattern of the reverse mapping coordinates into account. The presented architecture uses an adaptable memory allocation which can change the depth and the position of the line buffer between lines. A real-time stereo rectification use case has been implemented to validate the operation of this module. Depending on the scenario, the memory consumption can be reduced by a factor of two and more. A real-time image warping module for video cameras has been implemented in a single FPGA, without the use of off-chip memories.
Keywords :
buffer storage; computer vision; field programmable gate arrays; memory architecture; real-time systems; stereo image processing; system-on-chip; table lookup; video cameras; FPGA; LUT-based reverse mapping; adaptive memory architecture; field programmable gate arrays; frame buffers; line buffers; lookup table; memory consumption; not adaptable memory allocation; real-time image warping; real-time stereo rectification; source image; system-on-chip; temporary storage; video cameras; Buffer storage; Cameras; Memory management; Real-time systems; Resource management; Streaming media; Table lookup; FPGA; Warping; memory architecture; real-time; rectification; system-on-chip;
Conference_Titel :
Computer Design (ICCD), 2012 IEEE 30th International Conference on
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4673-3051-0
DOI :
10.1109/ICCD.2012.6378680