DocumentCode :
2481770
Title :
Track assignment considering crosstalk-induced performance degradation
Author :
Zhao, Qiong ; Hu, Jiang
Author_Institution :
Dept. of ECE, Texas A&M Univ., College Station, TX, USA
fYear :
2012
fDate :
Sept. 30 2012-Oct. 3 2012
Firstpage :
506
Lastpage :
507
Abstract :
Track assignment is a critical step between global routing and detailed routing in modern VLSI chip designs. Crosstalk, which is largely decided by wire adjacency, has significant impact on interconnect delay and circuit performance. Therefore, the amount of crosstalk should be restrained in order to satisfy timing constraints. In this work, a novel track assignment algorithm is proposed to reduce crosstalk-induced performance degradation. The problem is formulated as a Traveling Salesman Problem (TSP) and solved by a graph-based heuristic. Experimental results on the ISPD2011 benchmark circuits show that the violations on crosstalk bounds can be reduced by up to 99.56% compared to the conventional non-constraint-based heuristics.
Keywords :
VLSI; crosstalk; graph theory; integrated circuit design; integrated circuit interconnections; network routing; timing; travelling salesman problems; ISPD2011 benchmark circuit; TSP; VLSI chip design; circuit performance; crosstalk bound violation; crosstalk-induced performance degradation reduction; detailed routing; global routing; graph-based heuristic; interconnect delay; nonconstraint-based heuristics; timing constraint satisfaction; track assignment algorithm; traveling salesman problem; wire adjacency; Algorithm design and analysis; Crosstalk; Delay; Heuristic algorithms; Routing; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design (ICCD), 2012 IEEE 30th International Conference on
Conference_Location :
Montreal, QC
ISSN :
1063-6404
Print_ISBN :
978-1-4673-3051-0
Type :
conf
DOI :
10.1109/ICCD.2012.6378696
Filename :
6378696
Link To Document :
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