DocumentCode
2482251
Title
Implementing basic image processing programs onto a linearly connected parallel processor
Author
Ito, Hideaki ; Shimizu, Masaru ; Iida, Saburou
Author_Institution
Sch. of Inf. Sci. & Technol., Chukyo Univ., Toyota, Japan
fYear
2010
fDate
Nov. 30 2010-Dec. 2 2010
Firstpage
434
Lastpage
439
Abstract
In many image processing systems, an input grayscale image is reformed to make a clear image. After this reformation, the obtained gray-scale image is transformed into a binary image. Some gray-scale and binary image processing programs are implemented onto a linearly connected parallel processor. After partitioning an image into rectangular regions, each region is loaded in the main memory of a processing element (PE) as a partial image of the input image. PE´s are connected through two communication memories. By accessing different memories, it accesses pixels stored on adjacent PE´s without conflicts of memory access. In spite of the simple architecture of this linearly connected parallel processor, the results of the implementation of some programs indicate that execution times are improved, depending on the number of PE´s.
Keywords
image processing; parallel architectures; parallel programming; basic image processing programs; communication memories; input grayscale image; linearly connected parallel processor; linearly-connected parallel architecture; processing element; Computer architecture; Computers; Gray-scale; Histograms; Image edge detection; Pixel;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Sciences and Convergence Information Technology (ICCIT), 2010 5th International Conference on
Conference_Location
Seoul
Print_ISBN
978-1-4244-8567-3
Electronic_ISBN
978-89-88678-30-5
Type
conf
DOI
10.1109/ICCIT.2010.5711097
Filename
5711097
Link To Document