Title :
Low power implementation of SHA-1 algorithm for RFID system
Author :
Choi, Yongje ; Kim, Mooseop ; Kim, Taesung ; Kim, Howon
Author_Institution :
Electron. & Telecommun. Res. Inst., Daejeon
Abstract :
In this paper, we implemented the low power and small area hardware of SHA-1 hash function for RFID tag. For small area design we optimized operation logics and for low power design we minimized data transitions of register memory. It is implemented with 10,641 gates at Samsung 0.25 mum CMOS technology and it needs 330 operation clocks for one hash function of 160-bit data. Its power consumption is 19.5 muW at 100 kHz operation clock
Keywords :
CMOS logic circuits; cryptography; file organisation; radiofrequency identification; 0.25 micron; 100 kHz; CMOS technology; RFID system; SHA-1 algorithm; hash function; low power implementation; CMOS logic circuits; CMOS technology; Clocks; Design optimization; Energy consumption; Hardware; Logic design; RFID tags; Radiofrequency identification; Registers; Hash function; Low power; RFID system; SHA-1;
Conference_Titel :
Consumer Electronics, 2006. ISCE '06. 2006 IEEE Tenth International Symposium on
Conference_Location :
St. Petersburg
Print_ISBN :
1-4244-0216-6
DOI :
10.1109/ISCE.2006.1689488
