DocumentCode
2483520
Title
Cache injection on bus based multiprocessors
Author
Milenkovic, Aleksandar ; Milutinovic, Veljko
Author_Institution
Sch. of Electr. Eng., Belgrade Univ., Serbia
fYear
1998
fDate
20-23 Oct 1998
Firstpage
341
Lastpage
346
Abstract
Software-controlled cache prefetching and data forwarding are widely used techniques for tolerating memory latency in shared memory multiprocessors. However, some previous studies show that cache prefetching is not so effective on bus-based multiprocessors, while the effectiveness of data forwarding has not been explored in this environment, yet. In this paper, a novel technique called cache injection is proposed. Cache injection, tuned to the properties of bus-based architectures, combines advantages of both cache prefetching and data forwarding. Some preliminary experiments show that the proposed solution can significantly help in reducing the overall miss ratio and bus traffic in applications where write-shared data prevails
Keywords
cache storage; performance evaluation; shared memory systems; system buses; bus based multiprocessors; bus traffic; bus-based architectures; cache injection; data forwarding; experiments; memory latency tolerance; shared memory multiprocessors; software-controlled cache prefetching; write-shared data; Communication system control; Costs; Delay; Electronic switching systems; Multiprocessing systems; Multiprocessor interconnection networks; Postal services; Prefetching; Program processors; Virtual manufacturing;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliable Distributed Systems, 1998. Proceedings. Seventeenth IEEE Symposium on
Conference_Location
West Lafayette, IN
ISSN
1060-9857
Print_ISBN
0-8186-9218-9
Type
conf
DOI
10.1109/RELDIS.1998.740520
Filename
740520
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