• DocumentCode
    2483942
  • Title

    A New Kind of Cache Coherence Protocol with SC-Cache for Multiprocessor

  • Author

    Li, Jing-mei ; Liu, Wen-Jia ; Jiao, Ping

  • Author_Institution
    Harbin Eng., Univ. Harbin, Harbin, China
  • fYear
    2010
  • fDate
    22-23 May 2010
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    Aiming at the Cache coherence problem that brings by multiple processor cores of CMP(Chip multiprocessors) sharing the single memory space, this paper introduces a new kind of Cache coherence--CSC(Coherence with SC-Cache) based on write-through and write-back mechanism, which contains SC-Cache (Shared Coherence Cache) module. Experiments show that the protocol reduces the number of bus transactions, to a certain extent improves the efficiency of processor data access.
  • Keywords
    cache storage; microprocessor chips; cache coherence protocol; chip multiprocessors; coherence with SC-cache; multiple processor cores; shared coherence cache module; write-back mechanism; write-through mechanism; Access protocols; Cache storage; Communication system control; Delay; Image processing; Integrated circuit packaging; Logic; Microprocessors; Multicore processing; Productivity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Intelligent Systems and Applications (ISA), 2010 2nd International Workshop on
  • Conference_Location
    Wuhan
  • Print_ISBN
    978-1-4244-5872-1
  • Electronic_ISBN
    978-1-4244-5874-5
  • Type

    conf

  • DOI
    10.1109/IWISA.2010.5473538
  • Filename
    5473538