Title :
Reducing power consumption of HEVC codec with lossless reference frame recompression
Author :
Dajiang Zhou ; Li Guo ; Jinjia Zhou ; Goto, Satoshi
Author_Institution :
Grad. Sch. of Inf., Waseda Univ., Kitakyushu, Japan
Abstract :
Motion estimation and motion compensation in HEVC and similar video codecs involve huge memory traffic in storing and loading reference frames. The resulting memory power composes a significant portion of system energy consumption. This paper presents a memory power reduction framework that losslessly compresses and decompresses reference frames on-the-fly. We first present the architecture that supports the random access of frame data compressed in variable ratios. The latest recompression algorithms and the corresponding VLSI implementation are also introduced. The framework has been implemented in several UHDTV ASIC and FPGA codecs. Experiments under HEVC common test conditions show an average memory traffic reduction of near 60%.
Keywords :
VLSI; application specific integrated circuits; data compression; field programmable gate arrays; motion compensation; motion estimation; video codecs; video coding; FPGA codecs; HEVC codec; UHDTV ASIC; VLSI implementation; frame data compression; lossless reference frame decompression; lossless reference frame recompression; memory power reduction framework; memory traffic reduction; motion compensation; motion estimation; power consumption reduction; reference frame loading; reference frame storage; system energy consumption; video codecs; Algorithm design and analysis; Codecs; Decoding; Encoding; Random access memory; Throughput; Video coding; AVC; H.264; H.265; HEVC; embedded compression; frame recompression; lossless; power consumption; video decoder; video encoder;
Conference_Titel :
Image Processing (ICIP), 2014 IEEE International Conference on
Conference_Location :
Paris
DOI :
10.1109/ICIP.2014.7025425