Application of partitioning methods for the design of parallel programs for a system of digital signal processors

Author

Kortke, Mathias ; Schmitt, Thomas ; Merker, Renate

Author_Institution

Fac. of Electr. Eng., Tech. Univ. Dresden, Germany

fYear

2000

fDate

2000

Firstpage

139

Lastpage

143

Abstract

In this paper, the application of partitioning methods developed for the design of parallel processor arrays is examined for the parallel program generation. The target architecture is a system of digital signal processors (DSPs) with high bandwidth communication channels. The partitioning techniques are evaluated by means of a computationally intensive algorithm: the tomographic reconstruction method

Keywords

digital signal processing chips; parallel processing; parallel programming; telecommunication channels; computationally intensive algorithm; digital signal processors; high bandwidth communication channels; parallel processor arrays; parallel programs; partitioning methods; target architecture; tomographic reconstruction method; Bandwidth; Communication channels; Computer architecture; Design methodology; Digital signal processing; Digital signal processors; Partitioning algorithms; Process design; Signal processing algorithms; Tomography;

fLanguage

English

Publisher

ieee

Conference_Titel

Parallel Computing in Electrical Engineering, 2000. PARELEC 2000. Proceedings. International Conference on

Conference_Location

Trois-Rivieres, Que.

Print_ISBN

0-7695-0759-X

Type

conf

DOI

10.1109/PCEE.2000.873617

Filename

873617