A VLSI implementation of MIMO detection for future wireless communications

Author

Guo, Zhan ; Nilsson, Peter

Author_Institution

Dept. of ElectroSci., Lund Univ., Sweden

Volume

3

fYear

2003

fDate

7-10 Sept. 2003

Firstpage

2852

Abstract

This paper describes a VLSI implementation of V-BLAST detection for future multiple-input-multiple-output (MIMO) wireless communications. This design is implemented using a 0.35-μm 5-layer metal 3.3 V CMOS technology. For a 4-transmit and 4-receive antennas system using QPSK modulation scheme, a detecting throughput of 128 Mb/s can be achieved. Furthermore, it is shown that the implementation complexity can be reduced further to meet the requirements for future high speed downlink packet access (HSDPA) systems with MIMO extensions in 3^rd generation (3G) mobile wireless systems.

Keywords

3G mobile communication; CMOS integrated circuits; MIMO systems; VLSI; antenna arrays; quadrature phase shift keying; radio receivers; radio transmitters; receiving antennas; space-time codes; transmitting antennas; 0.35 micron; 128 Mbit/s; 3.3 V; 3G mobile wireless system; MIMO detection; QPSK modulation scheme; VLSI implementation; high speed downlink packet access system; metal CMOS technology; multiple-input-multiple-output wireless communication; receive antenna; transmit antenna; vertical-Bell-Labs-layered-space-time detection; wireless communication; Application specific integrated circuits; CMOS technology; Costs; MIMO; Multiaccess communication; Quadrature phase shift keying; Receiving antennas; Transmitting antennas; Very large scale integration; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Personal, Indoor and Mobile Radio Communications, 2003. PIMRC 2003. 14th IEEE Proceedings on

Print_ISBN

0-7803-7822-9

Type

conf

DOI

10.1109/PIMRC.2003.1259266

Filename

1259266