A VLSI implementation of MIMO detection for future wireless communications

This paper describes a VLSI implementation of V-BLAST detection for future multiple-input-multiple-output (MIMO) wireless communications. This design is implemented using a 0.35-μm 5-layer metal 3.3 V CMOS technology. For a 4-transmit and 4-receive antennas system using QPSK modulation scheme, a detecting throughput of 128 Mb/s can be achieved. Furthermore, it is shown that the implementation complexity can be reduced further to meet the requirements for future high speed downlink packet access (HSDPA) systems with MIMO extensions in 3^rd generation (3G) mobile wireless systems.