• DocumentCode
    2485620
  • Title

    Evaluation of DPA Attack Resistance of Transistor-Based Adiabatic Logic Styles

  • Author

    Bai, Xuefei ; Huang, Lu ; Wang, Yifei ; Hu, Xinwei

  • Author_Institution
    Dept. of Electron. Sci. & Technol., Univ. of Sci. & Technol. of China, Hefei, China
  • fYear
    2010
  • fDate
    22-23 May 2010
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    Differential power analysis attacks must be considered in low-power adiabatic logic crypto-system designs. This paper presents analyses, simulations and comparisons about the DPA resistance of several transistor-based adiabatic logic styles in a uniform testbench using a 0.18 μm CMOS technology. The simulation experiment results indicate that all the adiabatic logic styles have better DPA resistances than the conventional CMOS logic.
  • Keywords
    CMOS logic circuits; cryptography; logic design; power consumption; transistor-transistor logic; CMOS technology; DPA attack resistance evaluation; differential power analysis attack; low power adiabatic logic crypto system design; transistor based adiabatic logic styles; Analytical models; CMOS logic circuits; CMOS technology; Circuit simulation; Circuit testing; Cryptography; Energy consumption; Logic design; Logic testing; Pulse inverters;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    e-Business and Information System Security (EBISS), 2010 2nd International Conference on
  • Conference_Location
    Wuhan
  • Print_ISBN
    978-1-4244-5893-6
  • Electronic_ISBN
    978-1-4244-5895-0
  • Type

    conf

  • DOI
    10.1109/EBISS.2010.5473627
  • Filename
    5473627
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2485620