VLSI architecture design of rake receivers for cdma2000 systems

We propose low-complexity architecture for rake receivers in cdma2000 systems. The hardware cost of rake receivers is significantly increased in cdma2000 systems, because rake receivers should demodulate multi-path signals transmitted through multiple sub-carriers. We, therefore, present a novel architecture which adopts a multifinger structure, arithmetic units shared by multi-fingers, and time-deskew buffers using a pre-combining technique. The results show that the proposed receiver reduces the hardware complexity by about 49.4% compared with a conventional one.