DocumentCode
2486802
Title
An evaluation of the immunity characteristics of an LSI with capacitors embedded in an interposer
Author
Sasaki, Chie ; Saito, Yoshiyuki ; Takahashi, Eiji ; Sugaya, Yasuhiro ; Kobayashi, Hideki
Author_Institution
Printed Electron. & EMC Technol. Dev. Office, Panasonic Corp., Kadoma, Japan
fYear
2010
fDate
25-30 July 2010
Firstpage
473
Lastpage
478
Abstract
To improve the electrical characteristics of LSIs, we are developing technology for embedding chip capacitors into interposers for LSIs. In this paper, we applied an interposer with embedded capacitors to an image-processing LSI and compared its electrical characteristics with that of a conventional LSI. We confirmed improvements in the timing margin, signal integrity, and immunity characteristics of the LSI.
Keywords
capacitors; large scale integration; LSI; capacitors; electrical characteristics; immunity characteristics; interposer; signal integrity; timing margin; Capacitors; Large scale integration; Noise; Pins; Power supplies; Scattering parameters; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility (EMC), 2010 IEEE International Symposium on
Conference_Location
Fort Lauderdale, FL
ISSN
2158-110X
Print_ISBN
978-1-4244-6305-3
Type
conf
DOI
10.1109/ISEMC.2010.5711321
Filename
5711321
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