DocumentCode
2486830
Title
Modeling of the immunity of ICs to EFTs
Author
Zhang, Ji ; Koo, Jayong ; Beetner, Daryl G. ; Moseley, Richard ; Herrin, Scott ; Pommerenke, David
Author_Institution
EMC Lab., Missouri Univ. of Sci. & Technol., Rolla, MO, USA
fYear
2010
fDate
25-30 July 2010
Firstpage
484
Lastpage
489
Abstract
Investigation of the immunity of ICs to EFTs is increasingly important. In this paper, an accurate model of a microcontroller is developed and verified. This model consists of two parts: a passive Power Distribution Network (PDN) model and an active I/O protection network model. Measurement methods are designed to extract the parameters of the passive PDN model. The accuracy of the overall model of the IC is verified using both S parameter tests and EFT injection tests. The model is able to accurately predict the voltage and current at power-supply and I/O pins and correctly accounts for the active components of the I/O protection network.
Keywords
S-parameters; electromagnetic interference; integrated circuit modelling; I/O protection network model; S parameter tests; electrical fast transients; passive PDN model; power distribution network; Clamps; Impedance; Integrated circuit modeling; Pins; Power measurement; Semiconductor device measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility (EMC), 2010 IEEE International Symposium on
Conference_Location
Fort Lauderdale, FL
ISSN
2158-110X
Print_ISBN
978-1-4244-6305-3
Type
conf
DOI
10.1109/ISEMC.2010.5711323
Filename
5711323
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