DocumentCode
2488683
Title
A programmable analogue CMOS chip for high speed image processing based on cellular neural networks
Author
Kinget, Peter ; Steyaert, Michiel
Author_Institution
ESAT, Katholieke Univ., Leuven, Heverlee, Belgium
fYear
1994
fDate
1-4 May 1994
Firstpage
570
Lastpage
573
Abstract
This paper describes an analogue CMOS VLSI chip which implements a 4×4 continuous time cellular neural network (CNN) with programmable templates. With a new programmable current mirror circuit, the individual template values can be continuously set between 4 and 1/4 and the sign can be switched. Measurements are presented for the operation of the chip as a connected component detector, holefiller and shadow maker. It is demonstrated that this chip can be considered as an analogue programmable image processor. The programmable templates are to CNNs what instructions are to a microprocessor
Keywords
CMOS analogue integrated circuits; VLSI; analogue processing circuits; cellular neural nets; video signal processing; VLSI; cellular neural networks; connected component detector; current mirror circuit; high speed image processing; holefiller; programmable analogue CMOS chip; programmable templates; shadow maker; CMOS process; Capacitors; Cellular neural networks; Circuit optimization; Image edge detection; Image processing; Integrated circuit interconnections; Turing machines; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Conference_Location
San Diego, CA
Print_ISBN
0-7803-1886-2
Type
conf
DOI
10.1109/CICC.1994.379657
Filename
379657
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