DocumentCode
2488828
Title
LAYIN: toward a global solution for parasitic coupling modeling and visualization
Author
Clement, François J R ; Zysman, Eytan ; Kayal, Maher ; Declercq, Michel
Author_Institution
Electron. Lab., Swiss Federal Inst. of Technol., Zurich, Switzerland
fYear
1994
fDate
1-4 May 1994
Firstpage
537
Lastpage
540
Abstract
A CAD tool dedicated to parasitic substrate coupling modeling and visualization is presented. A CIF representation of the layout and a specific technology description are used to extract a simple parasitic substrate coupling model. The output is SPICE compatible and includes a geometrical information that is used to show on the layout the distribution of the equipotential lines produced by a perturbing source. Results are compared with measurements and other simulators to demonstrate the accuracy of the model
Keywords
SPICE; circuit layout CAD; integrated circuit layout; integrated circuit modelling; CAD tool; CIF representation; LAYIN; SPICE compatible output; geometrical information; global solution; layout; model; parasitic coupling modeling; parasitic coupling visualization; Circuit simulation; Coupling circuits; Data mining; Doping profiles; Mesh generation; Routing; SPICE; Semiconductor process modeling; Solid modeling; Visualization;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Conference_Location
San Diego, CA
Print_ISBN
0-7803-1886-2
Type
conf
DOI
10.1109/CICC.1994.379665
Filename
379665
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