Title :
A low power 20 bit instrumentation delta-sigma ADC
Author :
Yamamura, Ken ; Nogi, Akihiko ; Barlow, Allen
Author_Institution :
Asahi Kasei Microsyst., Tokyo, Japan
Abstract :
A very low power, high resolution analog to digital converter has been developed for instrumentation applications. User selectable 16 bit and 20 bit outputs are available. Employing a 4th order delta sigma modulator, the ADC achieves a DNL of less than ±0.5 LSB of 20 bits. Measured S/(D+N) is over 105 dB. The 10.8 mm2 die consumes less than 2 mW from a single 5 V supply and is implemented in a 1.2 μm p-well CMOS technology
Keywords :
CMOS integrated circuits; sigma-delta modulation; 16 bit; 2 mW; 20 bit; 4th order delta sigma modulator; 5 V; analog to digital converter; delta-sigma ADC; high resolution; instrumentation ADC; low power operation; p-well CMOS technology; single 5 V supply; user selectable outputs; Charge transfer; Circuits; Clocks; Energy consumption; Finite impulse response filter; Frequency; Instruments; Noise shaping; Pulse modulation; Sampling methods;
Conference_Titel :
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-1886-2
DOI :
10.1109/CICC.1994.379669
