Title :
A 12 bit 1 MHz ACD with 1 mW power consumption
Author :
Satou, Kouichi ; Tsuji, Kazuhiro ; Sahoda, Masayuki ; Otsuka, Hiroshi ; Mori, Kyoko ; Iida, Tetsuya
Author_Institution :
Toshiba Corp., Kawasaki, Japan
Abstract :
A new successive-approximation analog-to-digital (A/D) converter is described. New interpolated C-R DAC, new R-ladder-steering decoder and constant-current comparator have been applied in the A/D converter. By adopting these techniques, high-resolution (12 bit accuracy) and high-speed conversion (1 MHz) with low power consumption (1 mW) has been realized. This chip has been fabricated by double metal and double polysilicon 0.8 μm CMOS process, and the die size is 2.4×1.7 mm 2
Keywords :
CMOS integrated circuits; analogue-digital conversion; decoding; interpolation; 0.8 micron; 1 MHz; 1 mW; 12 bit; 12 bit 1 MHz with 1 mW power consumption; A/D converter; ACD; R-ladder-steering decoder; Si; analog-to-digital converter; constant-current comparator; double metal process; double polysilicon CMOS process; high-resolution; high-speed conversion; interpolated C-R DAC; low power consumption; successive-approximation; Capacitors; Clocks; Decoding; Digital circuits; Energy consumption; Parasitic capacitance; Resistors; Switches; Timing;
Conference_Titel :
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-1886-2
DOI :
10.1109/CICC.1994.379670
