Title :
A high speed, low power, swing restored pass-transistor logic based multiply and accumulate circuit for multimedia applications
Author :
Parameswar, Akilesh ; Hara, Hiroyuki ; Sakurai, Takayasu
Author_Institution :
Toshiba Corp., Kawasaki, Japan
Abstract :
Swing Restored Pass-transistor Logic (SRPL), a high speed, low power logic circuit technique for VLSI applications is described. By the use of a pass-transistor network to perform logic evaluation, and a latch type swing restoring circuit to drive gate outputs, this technique renders highly competitive circuit performance. An SRPL based multiply and accumulate circuit for multimedia applications is implemented in double metal 0.4 μm CMOS technology
Keywords :
CMOS logic circuits; VLSI; digital arithmetic; multimedia systems; 0.4 micron; VLSI applications; double metal CMOS technology; high speed operation; latch type; low power logic; multimedia applications; multiply/accumulate circuit; swing restored pass-transistor logic; Adders; CMOS logic circuits; Latches; Logic circuits; Logic devices; MOSFETs; Pulse inverters; Switches; Very large scale integration; Voltage;
Conference_Titel :
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-1886-2
DOI :
10.1109/CICC.1994.379719
