DocumentCode :
2490075
Title :
ILP synthesis of signal processing architectures with minimum structural complexity
Author :
Haroun, Baher ; Sajjadi, Behzad
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
fYear :
1994
fDate :
1-4 May 1994
Firstpage :
237
Lastpage :
240
Abstract :
In this paper, we present details of an integer linear programming (ILP) formulation for combined scheduling and operation bindings. The formulation is suitable for multiplexer based datapaths. A novel formulation and optimization criteria that minimizes structural complexity of the final datapath is presented. Architectural results having considerably lower interconnections and mux inputs than previous ILP solutions are shown for typical signal processing synthesis benchmarks
Keywords :
application specific integrated circuits; digital signal processing chips; field programmable gate arrays; integer programming; integrated circuit interconnections; linear programming; programmable logic arrays; scheduling; ASICs; ILP synthesis; final datapath; integer linear programming; minimum structural complexity; multiplexer based datapaths; operation bindings; programmable gate arrays; scheduling; signal processing architectures; synthesis benchmarks; Array signal processing; Computer architecture; Electronic mail; Field programmable gate arrays; Multiplexing; Programmable logic arrays; Programmable logic devices; Signal processing; Signal synthesis; Stochastic processes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-1886-2
Type :
conf
DOI :
10.1109/CICC.1994.379728
Filename :
379728
Link To Document :
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