• DocumentCode
    2490425
  • Title

    State assignment for low-power FSM synthesis using genetic local search

  • Author

    Olson, E. ; Kang, S.M.

  • Author_Institution
    Beckman Inst. for Adv. Sci. & Technol., Illinois Univ., Urbana, IL, USA
  • fYear
    1994
  • fDate
    1-4 May 1994
  • Firstpage
    140
  • Lastpage
    143
  • Abstract
    The power consumption of a finite state machine can be reduced if fewer internal nodes change states during operation. We assign the symbolic states representation so that the most probable state machine transitions change fewer state bits. We calculate the state transition probabilities from the given input signal probabilities and the Markov chain state probabilities (estimated from probability simulation). We reduce the Hamming distances between the binary representations of frequently transitioning pairs of states. Using a genetic local search algorithm, we can quickly find near optimal state assignments for finite state machines with less than fifty states and good assignments for larger benchmarks. The average power consumption is estimated using a sequential transition density simulator on gate-mapped representation of the design. The gate´s switching density is measured for each edge in the state transition graph and then scaled using the state transition density. Results using the MCNC benchmarks show that low-power state assignment produces encodings that consume about 20% less power than current “area optimizing” state encoding programs. When these encodings are synthesized into multilevel gate representations using SIS, we find that the area is also reduced
  • Keywords
    CMOS integrated circuits; capacitance; circuit optimisation; encoding; finite state machines; power consumption; state assignment; CMOS integrated circuits; Hamming distances; Markov chain state probabilities; average power consumption; binary representations; finite state machine; finite state machines; frequently transitioning pairs; genetic local search; genetic local search algorithm; input signal probabilities; internal nodes; low-power FSM synthesis; most probable state machine transitions; near optimal state assignments; power consumption; probability simulation; sequential transition density simulator; state assignment; state bits; state transition probabilities; symbolic states representation; Automata; CMOS technology; Capacitance; Circuit synthesis; Encoding; Energy consumption; Genetics; Probability; Sequential circuits; Switching frequency;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
  • Conference_Location
    San Diego, CA
  • Print_ISBN
    0-7803-1886-2
  • Type

    conf

  • DOI
    10.1109/CICC.1994.379749
  • Filename
    379749