A 1.5 GIPS video signal processor (VSP)

Author

Veendrick, H. ; Popp, O. ; Postuma, G. ; Lecoutere, M.

Author_Institution

Philips Res. Lab., Eindhoven, Netherlands

fYear

1994

fDate

1-4 May 1994

Firstpage

95

Lastpage

98

Abstract

A general purpose, programmable, digital video signal processor has been designed for efficient processing of real-time video signals. The chip is fabricated in a 0.8 μm CMOS technology on a die of 156 mm ². The parallel architecture of 28 processing elements realizes a throughput of 15 GIPS at a clock-frequency of 54 MHz. To achieve such a throughput, many of the blocks are custom designed. Special attention has been given to clock routing. Dedicated measures have been taken to reduce power and ground bounce. One of them is the inclusion of a low-voltage I/O mode, which also limits the power consumption. A set of programming tools supports the development of applications

Keywords

CMOS digital integrated circuits; digital signal processing chips; image processing equipment; parallel architectures; real-time systems; video equipment; video signal processing; 0.8 micron; 1.5 GIPS; 54 MHz; CMOS technology; DSP chip; clock routing; low-voltage I/O mode; parallel architecture; programmable digital signal processor; programming tools; real-time video signals; video signal processor; CMOS technology; Clocks; Energy consumption; Parallel architectures; Power measurement; Process design; Routing; Signal design; Signal processing; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994

Conference_Location

San Diego, CA

Print_ISBN

0-7803-1886-2

Type

conf

DOI

10.1109/CICC.1994.379759

Filename

379759