DocumentCode :
2491020
Title :
A Low-Ripple Fast-Settling CMOS Envelope Detector
Author :
Alegre, J.P. ; Celma, S. ; Sanz, M.T. ; Martínez, P.
Author_Institution :
Dept. of Electron. & Commun. Eng., Zaragoza Univ.
fYear :
0
fDate :
0-0 0
Firstpage :
9
Lastpage :
12
Abstract :
The design of a high performance envelope detector is made in this work. Proposed circuit does not need the traditional compensation between keeping and tracking required in these circuits due to a system by what the signal peaks are held in two periods and combined to obtain the envelope of the signal. Simulation results are offered comparing both the conventional and the proposed envelope detector and it is shown the superior performance of this circuit obtaining for a signal at 10MHZ smaller ripple (<1%), faster settling (0.4mus) and using smaller silicon area
Keywords :
CMOS integrated circuits; detector circuits; 10 MHz; CMOS envelope detector; high performance envelope detector; silicon area; Circuit simulation; Diodes; Envelope detectors; Filters; Frequency; Gain control; Linearity; Performance gain; Rectifiers; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Research in Microelectronics and Electronics 2006, Ph. D.
Conference_Location :
Otranto
Print_ISBN :
1-4244-0157-7
Type :
conf
DOI :
10.1109/RME.2006.1689883
Filename :
1689883
Link To Document :
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