Title :
Performance modeling of the modified mesh-connected parallel computer
Author :
Wang, C.J. ; Nelson, Victor P. ; Wu, C.H.
Author_Institution :
Dept. of Electr. & Comput. Eng., Colorado Univ., Colorado Springs, CO, USA
Abstract :
A message-passing computer architecture called the modified mesh-connected parallel computer (MMCPC) is proposed and studied. The MMCPC is designed to be general-purpose parallel architecture suitable for wafer-scale integration. Generalized stochastic Petri nets (GSPNs) are used to model the behavior of the MMCPC. The GSPN performance modeling results show a need for a new processing element (PE). A PE architecture, able to handle data processing and message passing concurrently, is proposed, and the silicon overhead is estimated in comparison with transputerlike PEs. Based on the proposed PE, optimum sizes of the MMCPC for different program structures are derived. A two-dimensional fast Fourier transform problem is used as an example to demonstrate that the MMCPC is a cost-effective performance-enhancement architecture to a real problem
Keywords :
Petri nets; parallel architectures; performance evaluation; message-passing computer architecture; modified mesh-connected parallel computer; parallel architecture; performance modeling; processing element; program structures; silicon overhead; stochastic Petri nets; two-dimensional fast Fourier transform; wafer-scale integration; Computer architecture; Concurrent computing; Data processing; Message passing; Parallel architectures; Petri nets; Semiconductor device modeling; Silicon; Stochastic processes; Wafer scale integration;
Conference_Titel :
Distributed Computing Systems, 1989., 9th International Conference on
Conference_Location :
Newport Beach, CA
Print_ISBN :
0-8186-1953-8
DOI :
10.1109/ICDCS.1989.37981
