Title :
Fine-Grained Partial Runtime Reconfiguration on Virtex-5 FPGAs
Author :
Koch, Dirk ; Beckhoff, Christian ; Torrison, Jim
Author_Institution :
Dept. of Inf., Univ. of Oslo, Oslo, Norway
Abstract :
The architecture of Xilinx FPGAs, has changed remarkable with respect to their ability to implement runtime reconfigurable systems throughout the last generations. This paper will discuss these changes and reveal an on-FPGA communication architecture that is especially tailored to Xilinx Virtex-5 FPGAs. With this architecture, modules can be integrated in a two-dimensional grid with more than a hundred of individual tiles while allowing a throughput of several GB/s to reconfigurable modules.
Keywords :
field programmable gate arrays; Virtex-5 FPGA; Xilinx FPGA; fine-grained partial runtime reconfiguration; Bars; Fabrics; Field programmable gate arrays; Random access memory; Reconfigurable logic; Routing; Runtime; Switches; Table lookup; Tiles; Partial Runtime reconfiguration; Virtex-5; on-FPGA communication;
Conference_Titel :
Field-Programmable Custom Computing Machines (FCCM), 2010 18th IEEE Annual International Symposium on
Conference_Location :
Charlotte, NC
Print_ISBN :
978-0-7695-4056-6
Electronic_ISBN :
978-1-4244-7143-0
DOI :
10.1109/FCCM.2010.19
