A VCO´s Phase-Noise Reduction Technique

A PLL-based technique, able to reduce phase noise and non linearity of voltage controlled oscillators, is presented. According to this technique, the phase of a VCO can be sampled using an analog circuit (phase to voltage converter). The resulting signal is filtered and fed back to the VCO, decreasing its phase noise. Based on the phase/jitter properties extracted from transistor level analysis, a voltage domain behavioral model of the system was simulated and significant phase noise reduction was confirmed