Title :
Increased Performace of FPGA-Based Color Classification System
Author :
Cho, Junguk ; Benson, Bridget ; Cheamanukul, Sunsern ; Kastner, Ryan
Author_Institution :
Dept. of Comput. Sci. & Eng., Univ. of California, La Jolla, CA, USA
Abstract :
This paper presents a hardware architecture for increased performance of color classification. In our architecture, color classification, based on an AdaBoost algorithm, identifies a pixel as having the color of interest or not. We designed the proposed architecture using Verilog HDL and implemented the design in a Xilinx Virtex-5 FPGA. The architecture for color classification can have 598 times performance improvement over an equivalent software solution and 1.9 times performance improvement over the leading hardware color classifier.
Keywords :
computer architecture; field programmable gate arrays; AdaBoost algorithm; FPGA-based color classification system; Verilog HDL; Xilinx Virtex-5 FPGA; equivalent software solution; hardware color classifier; Classification algorithms; Color; Computer architecture; Face detection; Field programmable gate arrays; Hardware design languages; Image processing; Real time systems; Skin; Software performance; AdaBoost; FPGA; Verilog HDL; architecture; color classification; image processing;
Conference_Titel :
Field-Programmable Custom Computing Machines (FCCM), 2010 18th IEEE Annual International Symposium on
Conference_Location :
Charlotte, NC
Print_ISBN :
978-0-7695-4056-6
Electronic_ISBN :
978-1-4244-7143-0
DOI :
10.1109/FCCM.2010.50
