• DocumentCode
    2491563
  • Title

    Run-time HW/SW codesign for discrete event systems using dynamically reconfigurable architectures

  • Author

    Noguera, Juanjo ; Badia, Rosa M.

  • Author_Institution
    Univ. Autonoma de Barcelona, Spain
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    100
  • Lastpage
    106
  • Abstract
    Hardware/software (HW/SW) codesign and reconfigurable computing (RC) are commonly used methodologies for digital systems design. However, no previous work has been carried out in order to define a run-time HW/SW codesign methodology for dynamically reconfigurable architectures. Besides, all previous approaches to RC context scheduling were based on static scheduling techniques. In this paper, we present a run-time HW/SW codesign methodology for discrete event systems using dynamically reconfigurable architectures and a dynamic approach to RC multi-context scheduling. We have applied our methodology to software acceleration and present the obtained results
  • Keywords
    discrete event systems; hardware-software codesign; processor scheduling; reconfigurable architectures; digital systems design; discrete event systems; dynamically reconfigurable architectures; multi-context scheduling; reconfigurable computing; run-time hardware/software codesign; software acceleration; Acceleration; Discrete event systems; Dynamic scheduling; Embedded system; Hardware; Partitioning algorithms; Processor scheduling; Reconfigurable architectures; Runtime; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System Synthesis, 2000. Proceedings. The 13th International Symposium on
  • Conference_Location
    Madrid
  • ISSN
    1080-1820
  • Print_ISBN
    0-7695-0765-4
  • Type

    conf

  • DOI
    10.1109/ISSS.2000.874035
  • Filename
    874035