Systematic data reuse exploration methodology for irregular access patterns

The efficient use of an optimized custom memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption in embedded data-dominated applications. Only recently have effective formalized techniques to deal with this specific task been addressed. They work well for homogeneous signal access patterns but cannot handle other cases. In this paper, we extend and parameterize the design space and establish heuristics for efficient exploration, such that better results in terms of area and power can be achieved for applications where holes are present in the signal access pattern. The extended methodology is illustrated for several real-life image processing algorithms