Design Techniques for VHF Filtering in Digital CMOS Technologies

Author

Otin, A. ; Celma, S. ; Aldea, C.

Author_Institution

Group of Electron. Design, Zaragoza Univ.

fYear

0

fDate

0-0 0

Firstpage

145

Lastpage

148

Abstract

In this paper we report a design strategy for VHF filtering in standard digital CMOS processes. The design approach is based on fully-balanced pseudo-differential continuous-time transconductors for applications in low-voltage systems over the VHF range and implemented with MOS-C accumulation capacitors. A 3rd-order G_m-C low-pass Butterworth filter has been implemented, using a 0.35 mum standard CMOS process, with a cut-off frequency programmability over the 40-200 MHz range, which confirm the feasibility of the proposed strategy in applications such as data storage systems and IF strips. The filter consumes less than 3.8 mW per pole at 41 MHz from a 2V supply. The measured dynamic range was better than 53 dB at THD of 1%. The active chip area is 0.02 mm² per pole

Keywords

Butterworth filters; CMOS digital integrated circuits; VHF filters; continuous time filters; digital filters; integrated circuit design; low-pass filters; 0.35 micron; 2 V; 40 to 200 MHz; Butterworth filter; MOS-C accumulation capacitors; VHF filtering; VHF range; digital CMOS technologies; low-pass filter; low-voltage systems; pseudodifferential continuous-time transconductors; CMOS process; CMOS technology; Capacitors; Cutoff frequency; Data storage systems; Digital filters; Filtering; Low pass filters; Process design; Transconductors;

fLanguage

English

Publisher

ieee

Conference_Titel

Research in Microelectronics and Electronics 2006, Ph. D.

Conference_Location

Otranto

Print_ISBN

1-4244-0157-7

Type

conf

DOI

10.1109/RME.2006.1689917

Filename

1689917