DocumentCode :
2491818
Title :
A multi-level strategy for software power estimation
Author :
Brandolese, C. ; Fornaciari, W. ; Pomante, L. ; Salice, F. ; Sciuto, D.
Author_Institution :
Politecnico di Milano, Italy
fYear :
2000
fDate :
2000
Firstpage :
187
Lastpage :
192
Abstract :
In this paper a comprehensive methodology for software power estimation is presented. The methodology is supported by rigorous mathematical models of power consumption at three different levels of abstraction. The methodology has been validated in a complete framework developed within the TOSCA co-design environment
Keywords :
embedded systems; hardware-software codesign; program compilers; TOSCA; compilers; embedded systems; hardware software co-design; mathematical models; multilevel strategy; power consumption; software power estimation; Algorithm design and analysis; Application software; Assembly; Constraint optimization; Embedded system; Energy consumption; Mathematical model; Microprocessors; Performance analysis; Software performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System Synthesis, 2000. Proceedings. The 13th International Symposium on
Conference_Location :
Madrid
ISSN :
1080-1820
Print_ISBN :
0-7695-0765-4
Type :
conf
DOI :
10.1109/ISSS.2000.874048
Filename :
874048
Link To Document :
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