Simultaneous multi-standard support in programmable baseband processors

Programmability is increasingly important in future multi-standard radio systems. In this paper we present enhanced baseband processor architecture capable of efficiently supporting simultaneous multi-standard operation. Our DSP processor is based on the SIMT (single instruction stream multiple tasks) architecture which allows concurrent vector tasks to be executed on the processor controlled by only a single narrow instruction stream. By profiling and mapping GSM and WLAN (IEEE 802.11g) to the architecture we show that simultaneous support for the above mentioned standards can be accomplished with 245 MHz clock frequency and 1359 words of complex data memory on the given architecture