Using Multiple-Valued Gates to Implement Reversible Logic

Reversible logic is becoming more and more prominent as the technology sets higher demands on heat, power, scaling and stability. The ideal theoretical reversible gate consumes "zero" energy and is able at any time to "undo" the current step or function. Multiple-valued logic has the advantage to transport and evaluate higher bits each clock cycle than binary. And as we demonstrate in this paper, combining these to disciplines we can construct powerful multiple-valued reversible logic structures. Measurements from a fabricated chip and simulation results are included