DocumentCode :
2493398
Title :
Graphical Optimization of Common-Gate LNA
Author :
Stiicke, T. ; Christoffers, N. ; Kokozinski, Rainer ; Kolnsberg, S. ; Hosticka, B.J.
Author_Institution :
Fraunhofer Inst. for Microelectron. Circuits & Syst., Duisburg
fYear :
0
fDate :
0-0 0
Firstpage :
453
Lastpage :
456
Abstract :
In this paper a novel optimization strategy for common-gate LNAs (CG-LNAs) is presented. It based on the modeling of the MOSFET behavior with its intrinsic and extrinsic parasitics in all possible areas of operation. The model leads to a graphical strategy, which shows the advantages of an operating point in moderate inversion in case of a short channel device. Furthermore, it shows how the tradeoff between low input reflection S11 and minimum noise figure NF must be made in case of a short channel device
Keywords :
MOSFET circuits; circuit optimisation; low noise amplifiers; MOSFET; common gate LNA; graphical optimization; Acoustic reflection; Capacitors; Equations; Frequency; Inductors; Linearity; MOSFET circuits; Noise figure; Transconductance; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Research in Microelectronics and Electronics 2006, Ph. D.
Conference_Location :
Otranto
Print_ISBN :
1-4244-0157-7
Type :
conf
DOI :
10.1109/RME.2006.1689991
Filename :
1689991
Link To Document :
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