DocumentCode :
2496228
Title :
Economical importance of the maximum chip area
Author :
Hirase, Junichi
Author_Institution :
Matsushita Electr. Ind. Co. Ltd., Japan
fYear :
1998
fDate :
2-4 Dec 1998
Firstpage :
64
Lastpage :
68
Abstract :
In recent years, coupled with the lower voltages, lower power and current consumption and higher speeds brought about by miniaturization, VLSI has been experiencing radical changes in technology such as an increase in scale, higher integration and an increase in the number and complexity of functions. In spite of these technological changes, reduction of manufacturing costs is still a major task at the VLSI manufacturing site. This paper will study the maximum limit of the chip area enabling the manufacture of cheap VLSI and will show that when developing and manufacturing devices having a chip area that exceeds this limit it is more advantageous to use two-chip, three-chip, or multi-chip devices
Keywords :
VLSI; cost-benefit analysis; integrated circuit economics; IC economics; VLSI; manufacturing costs; manufacturing site; maximum chip area; multi-chip devices; Assembly; Costs; Diffusion processes; Manufacturing processes; Packaging; Personnel; Production facilities; Pulp manufacturing; Testing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 1998. ATS '98. Proceedings. Seventh Asian
ISSN :
1081-7735
Print_ISBN :
0-8186-8277-9
Type :
conf
DOI :
10.1109/ATS.1998.741588
Filename :
741588
Link To Document :
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