False-path removal using delay fault simulation

Some false paths are caused by redundant stuck-at faults. Removal of those stuck-at faults automatically eliminates such false paths from the circuit. However, there are other false paths that are not associated with any redundant stuck-at fault. All links of such a false path are shared with other testable paths. We focus on the elimination of this type of false paths. We use a nonenumerative path delay fault simulator, which duplicates selected gates to separate the detected and undetected path delay faults. The expanded circuit may contain new redundant stuck-at faults, corresponding to those undetected paths that are false. This happens because in the expanded circuit some new links have only false paths passing through them. Such links become the sites for redundant stuck-at faults. Removal of these redundant faults eliminates false paths. The quality of the result may depend on the coverage of testable paths by the vectors that are simulated. Since a non-enumerative path delay simulation and an implication-based redundancy removal technique are used, the present procedure of false-path elimination can be applied to very large circuits