Title :
An instrumented observability coverage method for system validation
Author :
Lisherness, Peter ; Cheng, Kwang-Ting Tim
Author_Institution :
ECE Dept., Univ. of California, Santa Barbara, Santa Barbara, CA, USA
Abstract :
In order to improve effectiveness and efficiency of post-silicon validation, we present a fault-symbol tracking method and a coverage metric that account for the limited observability in silicon and thus are useful for guiding validation test selection, test development, and design for debug. The coverage points targeted in this study are a set of fault-symbols, or `tags´, generated from each expression in a system model. Coverage is measured in simulation by tracking tags alongside dynamic information flows to user-defined or implicit observation points. Computation of the metric is performed based on high-level (C/C++) functional and behavioral models through compiler-inserted parallel fault-symbol tracking instrumentation, which offers high efficiency as well as compatibility with existing simulation flows. The coverage results from our initial implementation for a microcontroller instruction set simulator are compared with the statement and mutation coverages. The results show that the new coverage metric is more accurate than the statement coverage and can be computed in significantly shorter runtimes than the mutation coverage.
Keywords :
hardware description languages; high level synthesis; integrated circuit design; integrated circuit testing; observability; compiler-inserted parallel fault- symbol tracking instrumentation; coverage metric; design for debug; dynamic information flows; fault-symbol tracking method; high-level behavioral models; high-level functional models; instrumented observability coverage method; microcontroller instruction set simulator; post-silicon validation; system validation; tag tracking; test development; validation test selection; Computational modeling; Concurrent computing; Genetic mutations; High performance computing; Instruments; Microcontrollers; Observability; Silicon; Target tracking; Testing; dynamic data-flow analysis; dynamic information-flow analysis; observability coverage; post-silicon validation; system-level validation;
Conference_Titel :
High Level Design Validation and Test Workshop, 2009. HLDVT 2009. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-4823-4
Electronic_ISBN :
1552-6674
DOI :
10.1109/HLDVT.2009.5340171