Fault characterization of low capacitance full-swing BiCMOS logic circuits

Author

Aziz, S.M. ; Kamruzzaman, J.

Author_Institution

Dept. of Electr. & Electron. Eng., Bangladesh Univ. of Eng. & Technol., Dhaka, Bangladesh

fYear

1998

fDate

2-4 Dec 1998

Firstpage

119

Lastpage

123

Abstract

An analysis of the testability of a class of low capacitance full-swing BiCMOS logic circuits is presented in this paper. It is shown that the stuck-open faults in the bipolar drivers of these circuits are masked by the additional MOS devices used to obtain full output logic swing. However, the stuck-open faults in the MOS devices are detectable by two-pattern tests as in standard CMOS. All single stuck-on faults result in significant increment in I_DDQ when sensitized. Therefore, like static CMOS, these faults can be detected by I_DDQ testing

Keywords

BiCMOS logic circuits; capacitance; fault simulation; integrated circuit testing; logic testing; IDDQ testing; MOS devices; bipolar drivers; fault characterization; full-swing BiCMOS logic circuits; low capacitance BiCMOS logic circuits; single stuck-on faults; stuck-open faults; testability analysis; two-pattern tests; BiCMOS integrated circuits; Capacitance; Circuit faults; Circuit testing; Driver circuits; Fault detection; Logic circuits; Logic devices; Logic testing; MOS devices;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 1998. ATS '98. Proceedings. Seventh Asian

ISSN

1081-7735

Print_ISBN

0-8186-8277-9

Type

conf

DOI

10.1109/ATS.1998.741601

Filename

741601