DocumentCode
2496704
Title
Fast window test method of hysteresis test
Author
Corpuz, Terry
Author_Institution
Test Assistance Group, Teradyne Inc., Makati, Philippines
fYear
1998
fDate
2-4 Dec 1998
Firstpage
179
Lastpage
183
Abstract
The conventional method of hysteresis test for digital input pin, as defined by (Vih-Vil), performs two VLS (Voltage Level Search) to measure the actual Vih and Vil. A typical tester spends an average of 120 ms for each VLS, resulting in a test time of 240 ms for each pin requiring a hysteresis test. This paper introduces a new method which is 70 times faster than the conventional method. The presented test algorithm is in pseudo-code format for easy translation to PASCAL, C, FORTRAN, or other language
Keywords
automatic test software; digital integrated circuits; hysteresis; integrated circuit testing; digital IC testing; digital input pin; fast window test method; hysteresis test; pseudo-code format; test algorithm; voltage level search; Design engineering; Hysteresis; Inspection; Manufacturing; Performance evaluation; Software packages; Software testing; Testing; Threshold voltage; Trigger circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 1998. ATS '98. Proceedings. Seventh Asian
ISSN
1081-7735
Print_ISBN
0-8186-8277-9
Type
conf
DOI
10.1109/ATS.1998.741611
Filename
741611
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