On testing of Josephson logic circuits consisting of RSFQ dual-rail logic gates

Author

Yamada, Teruhiko ; Hanashima, Tsuneto ; Suemori, Yasuhiro ; Maezawa, Masaaki

Author_Institution

Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan

fYear

1998

fDate

2-4 Dec 1998

Firstpage

222

Lastpage

227

Abstract

We have specified typical fabrication defects of the rapid single-flux-quantum (RSFQ) based logic gates, and then investigated the behavior of defective gates by SPICE simulation to estimate the defect coverage of logic testing. The simulation results show that the logic testing based on the stuck-at fault model can achieve at most 65% defect coverage for pulse-driven dual-rail RSFQ logic circuits and the defect coverage may increase up to 80% by properly adding two-pattern tests to the stuck-at fault tests

Keywords

SPICE; circuit simulation; fault diagnosis; logic simulation; logic testing; quantum gates; quantum interference devices; superconducting logic circuits; Josephson logic circuits; RSFQ dual-rail logic gates; SPICE simulation; defect coverage; defective gates; fabrication defects; logic testing; pulse-driven circuits; rapid single-flux-quantum gates; stuck-at fault model; two-pattern tests; Circuit faults; Circuit simulation; Circuit testing; Fabrication; Josephson junctions; Logic circuits; Logic gates; Logic testing; Pulse circuits; SPICE;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 1998. ATS '98. Proceedings. Seventh Asian

ISSN

1081-7735

Print_ISBN

0-8186-8277-9

Type

conf

DOI

10.1109/ATS.1998.741617

Filename

741617