An examination of PRPG selection approaches for large, industrial designs

Author

Bayraktaroglu, Ismet ; Udawatta, Kapila ; Orailoglu, Alex

Author_Institution

Dept. of Comput. Sci. & Eng., California Univ., San Diego, La Jolla, CA, USA

fYear

1998

fDate

2-4 Dec 1998

Firstpage

440

Lastpage

444

Abstract

A study for selecting effective pseudo-random pattern generators (PRPGs) for large industrial designs is undertaken. For the PRPG selection process, guidance from a set of ISCAS benchmark circuits is initially sought. The set of benchmark circuits used is shown to be ineffective in providing material guidance. The alternative of PRPG selection through actual design experimentation is examined and its weaknesses identified and outlined. A brief DFT analysis is outlined to indicate the importance of early PRPG selection

Keywords

VLSI; built-in self test; design for testability; digital integrated circuits; fault simulation; integrated circuit design; integrated circuit testing; large scale integration; logic testing; BIST; DFT analysis; ISCAS benchmark circuits; PRPG selection; large industrial designs; pseudo-random pattern generators; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Clocks; Computer science; Costs; Design for testability; Ear; Logic design; Manufacturing; Manufacturing industries; Read only memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 1998. ATS '98. Proceedings. Seventh Asian

ISSN

1081-7735

Print_ISBN

0-8186-8277-9

Type

conf

DOI

10.1109/ATS.1998.741654

Filename

741654