• DocumentCode
    2498362
  • Title

    Defining neighborhood relations for fast spatial-temporal partitioning of applications on reconfigurable architectures

  • Author

    Sim, Joon Edward ; Mitra, Tulika ; Wong, Weng-Fai

  • Author_Institution
    Sch. Of Comput., Nat. Univ. of Singapore, Singapore
  • fYear
    2008
  • fDate
    8-10 Dec. 2008
  • Firstpage
    121
  • Lastpage
    128
  • Abstract
    Considering both spatial and temporal partitioning, though potentially profitable, increases the complexity of the design space of applications for run-time reconfigurable architectures. In particular, the number of ways to partition is exponential and dynamic reconfiguration cost is difficult to estimate. These difficulties are particularly challenging for the implementation of neighborhood searches over the design space, such as the sheer amount of design space to be searched and time taken to evaluate each design point accurately. In order to address these challenges, this paper presents a framework that enables fast navigation of the design space using any neighborhood search schemes. The key is a neighborhood relation which spans the entire spatial and temporal partitioning design space. Computed over a SEQUITUR compressed loop trace structure, this relation enables the fast estimation of neighboring design points. We implemented two neighborhood searches, Hill-climb and tabu search, to evaluate our technique. On four non-trivial benchmarks, these searches are accelerated by up to two orders of magnitude when using our proposed technique while finding optimal results most of the time.
  • Keywords
    logic partitioning; reconfigurable architectures; search problems; Hill climb search; SEQUITUR compressed loop trace structure; neighborhood relation; neighborhood search scheme; run-time reconfigurable architecture; spatial-temporal partitioning design space; tabu search; Acceleration; Costs; Hardware; Kernel; Navigation; Programmable logic arrays; Programmable logic devices; Reconfigurable architectures; Reconfigurable logic; Runtime;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ICECE Technology, 2008. FPT 2008. International Conference on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4244-3783-2
  • Electronic_ISBN
    978-1-4244-2796-3
  • Type

    conf

  • DOI
    10.1109/FPT.2008.4762374
  • Filename
    4762374