• DocumentCode
    2498676
  • Title

    A high-speed parallel signal processor for a PRC phase-coded CW radar

  • Author

    QingXiang, Zhang ; Ning, Zhang ; Wei, Zheng

  • Author_Institution
    Res. Inst. of Electron. Eng., Harbin Inst. of Technol., China
  • Volume
    2
  • fYear
    1996
  • fDate
    14-18 Oct 1996
  • Firstpage
    1639
  • Abstract
    This paper describes an overview of a high-speed parallel signal processor that has been developed for a PRC phase-coded CW radar. It is a MIMD machine that consists of three subprocessors. Each subprocessor performs the beam signal processing tasks, and the architecture of the subprocessor is a static multi-function macropipeline. The processing speed of the signal processor is 2400 million operations per second (MOPS). The subclutter visibility (SCV) reaches 114 dB
  • Keywords
    CW radar; encoding; parallel architectures; parallel machines; pipeline processing; radar clutter; radar computing; radar equipment; radar signal processing; 2400 MFLOPS; MIMD machine; PRC phase coded CW radar; beam signal processing; high speed parallel signal processor; multifunction macropipeline; processing speed; subclutter visibility; subprocessor architecture; Clutter; Digital signal processing; Filters; Parallel processing; Partial response channels; Pipelines; Radar signal processing; Signal processing; Signal processing algorithms; Signal resolution;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing, 1996., 3rd International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    0-7803-2912-0
  • Type

    conf

  • DOI
    10.1109/ICSIGP.1996.571210
  • Filename
    571210