• DocumentCode
    2498878
  • Title

    An 11,424-gate dynamic optically reconfigurable gate array VLSI

  • Author

    Nakajima, Mao ; Watanabe, Minoru

  • Author_Institution
    Electr. & Electron. Eng., Shizuoka Univ., Hamamatsu
  • fYear
    2008
  • fDate
    8-10 Dec. 2008
  • Firstpage
    293
  • Lastpage
    296
  • Abstract
    A DORGA architecture has been proposed to increase gate density. It uses the junction capacitance of photo-diodes as dynamic memory, thereby obviating the static configuration memory. This paper presents the worldpsilas largest 11,424 gate-count dynamic optically reconfigurable gate array (DORGA) VLSI fabricated on a 96.04 mm2 chip using a 0.35 mum three-metal CMOS process technology and a perfect optical system using a holographic memory. The advantages of this architecture are discussed in relation to the results described herein.
  • Keywords
    CMOS integrated circuits; VLSI; field programmable gate arrays; CMOS process technology; DORGA architecture; dynamic optically reconfigurable gate array VLSI; optical system; static configuration memory; CMOS process; CMOS technology; High speed optical techniques; Holographic optical components; Holography; Optical arrays; Optical devices; Photodiodes; Programmable logic arrays; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ICECE Technology, 2008. FPT 2008. International Conference on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4244-3783-2
  • Electronic_ISBN
    978-1-4244-2796-3
  • Type

    conf

  • DOI
    10.1109/FPT.2008.4762401
  • Filename
    4762401
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2498878