DocumentCode
2499215
Title
Efficient FPGA elliptic curve cryptographic processor over GF(2m)
Author
Antão, Samuel ; Chaves, Ricardo ; Sousa, Leonel
Author_Institution
Inst. Super. Tecnico, Lisbon
fYear
2008
fDate
8-10 Dec. 2008
Firstpage
357
Lastpage
360
Abstract
In this paper a processor that supports elliptic curve cryptographic applications over GF (2m) is proposed. The proposed structure is capable of calculating point multiplication and addition using a single coordinate to contain the point information. This compression allows for a better usage of the bandwidth resources. For the point multiplication procedure, all coordinate pre-calculations are completely avoided. This design was successful prototyped on a reconfigurable device for the field GF (2163). Experimental results suggest that point multiplication can be performed in 144 mus and point affine addition in 1.02 mus. Comparing with the related work, a 5 times speedup is obtained for point addition and multiplication. The presented design offers a well balanced area-time performance when compared with existent elliptic curve point multiplication specific processors.
Keywords
Galois fields; bandwidth compression; field programmable gate arrays; public key cryptography; FPGA elliptic curve cryptographic processor; GF(2m); bandwidth resource compression; field programmable gate array; point affine addition; point multiplication procedure; reconfigurable device; time 1.02 mus; time 144 mus; Algorithm design and analysis; Bandwidth; Digital signatures; Elliptic curve cryptography; Elliptic curves; Field programmable gate arrays; Processor scheduling; Protocols; Prototypes; Public key;
fLanguage
English
Publisher
ieee
Conference_Titel
ICECE Technology, 2008. FPT 2008. International Conference on
Conference_Location
Taipei
Print_ISBN
978-1-4244-3783-2
Electronic_ISBN
978-1-4244-2796-3
Type
conf
DOI
10.1109/FPT.2008.4762417
Filename
4762417
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