DocumentCode
2499278
Title
ρ-VEX: A reconfigurable and extensible softcore VLIW processor
Author
Wong, Stephan ; Van As, Thijs ; Brown, Geoffrey
Author_Institution
Comput. Eng. Lab., Delft Univ. of Technol., Delft
fYear
2008
fDate
8-10 Dec. 2008
Firstpage
369
Lastpage
372
Abstract
This paper presents the architectural design of a reconfigurable and extensible very long instruction word (VLIW) processor. In addition to architectural extensibility, our processor also supports reconfigurable operations. Furthermore, we present an application development framework to optimally exploit the freedom of reconfigurable operations. Because our processor is based on the VEX ISA, we already have a good compiler which is able to deal with ISA extensibility and reconfigurable operations. Our results show that different configurations of our processor lead to considerable cycle count reductions for a selected benchmark application.
Keywords
field programmable gate arrays; parallel architectures; reconfigurable architectures; VEX ISA; architectural extensibility; extensible softcore VLIW processor; reconfigurable softcore VLIW processor; rho-VEX; very long instruction word; Assembly; Computer aided instruction; Computer architecture; Design engineering; Field programmable gate arrays; Hardware; Laboratories; Software tools; Systolic arrays; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
ICECE Technology, 2008. FPT 2008. International Conference on
Conference_Location
Taipei
Print_ISBN
978-1-4244-3783-2
Electronic_ISBN
978-1-4244-2796-3
Type
conf
DOI
10.1109/FPT.2008.4762420
Filename
4762420
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