Title :
A 2GSPS 8-bit ADC with digital foreground calibration technology
Author :
Zhang, Zheng-Ping ; Wang, Yong-lu ; Huang, Xin-Fa
Author_Institution :
No.24 Res. Inst., China Electron. Technol. Group Corp., Chongqing, China
Abstract :
A high-speed 8-bit analog-to-digital converter in 0.35μm BiCMOS process technology is presented. The ADC uses the unique folding and interpolating architecture and the dual-channel timing interleave multiplexing technology to achieve a sampling rate of 2GSPS. In case of digital calibration, as a result of testing, the ADC achieves 7.32ENOB at analog input of 484MHz, and 7.1ENOB at Nyquist input after the chip is self-corrected.
Keywords :
BiCMOS integrated circuits; analogue-digital conversion; calibration; 2GSPS ADC; BiCMOS process technology; analog-to-digital converter; digital foreground calibration technology; dual-channel timing interleave multiplexing technology; folding architecture; frequency 484 MHz; interpolating architecture; size 0.35 mum; word length 8 bit; Bandwidth; BiCMOS integrated circuits; Calibration; Clocks; Interpolation; Preamplifiers; Resistors; 2GSPS; digital calibration; folding and interpolating; interleave;
Conference_Titel :
Anti-Counterfeiting, Security and Identification (ASID), 2011 IEEE International Conference on
Conference_Location :
Xiamen
Print_ISBN :
978-1-61284-631-6
DOI :
10.1109/ASID.2011.5967436
